When using an NDT/NDI device, such as an eddy current flaw detector, inspecting a test object, some instruments are designed to operate at frequencies referred to as the “operating frequency”. Under most testing scenarios, the instrument sends a strong excitation signal to the probe to form the eddy current in the material under test. Since the instrument is tasked to measure very small changes to the phase and amplitude of the signal returned back to the probe as it is moved across the surface of the test object, it is highly desirable for the instrument to be able to null the unchanging portion of the signal and to better focus on the small changes. The existing eddy current instruments have not shown to be effective in nulling the unchanging portion, which largely decreases the sensitivity of the measurement and impedes the capture of very small changes or defects.
The electronic circuitry of eddy current instruments commonly involve the usage of an electronic component widely known as direct digital synthesizer (herein later as “DDS”) for performing direct digital synthesizing functions. When multiple outputs of the DDS are devises for building reference signals, it can be appreciated by those skilled in the art that the high or perfectly repeatability of the DDS signals it is crucial.
It is known in the art that perfect repeatability is a property of digital signal where each and every sine wave is composed of an identical set of numbers.
A DDS of conventional architecture uses a control register to control the frequency. According to http://en.wikipedia.org/wiki/Direct_digital_synthesizer, a basic Direct Digital Synthesizer consists of a frequency reference (often a crystal or SAW oscillator), a numerically controlled oscillator (NCO) or an accumulator and a digital-to-analog converter (DAC) as shown in the figure of this reference.
The reference provides a stable time base for the system and determines the frequency accuracy of the DDS. It provides the clock to the NCO or accumulator which produces at its output a discrete-time, quantized version of the desired output waveform (often a sinusoid) whose period is controlled by the digital word contained in the frequency control register. The sampled, digital waveform is converted to an analog waveform by the DAC. The output reconstruction filter rejects the spectral replicas produced by the zero-order hold inherent in the analog conversion process.
As can be seen in the conventional DDS, the value of the frequency control register is added to the accumulator repeatedly on every system clock cycle. Thus the accumulator produces a series of ascending values. After a period of time the accumulator overflows, the carry bit is generated but it is not used. This causes the accumulator value to drop to a lower value and continues to accumulate without end. This is called modular arithmetic. The accumulator value is then passed to a circuit that performs the function SIN(accumulator*constant) to convert the accumulator values into a continuous sine wave for the digital to analog converter.
For example, a conventional DDS constructed using a 32 bit accumulator and a 100 MHz system clock can synthesize signals as low as 0.023283064 Hz. All possible operating frequencies of this DDS are integer multiples of 0.023283064 Hz. That is to say operating frequency=0.023283064*frequency control register. This provides frequency accuracy of 0.12% or better for all frequencies greater than 10 Hz.
According to Applicant's observation, signals of many frequencies produce numeric number sequences that are passed to the DAC that may take as long as 42.95 seconds (232/108) before they repeat. Because the DDS generates each consecutive sine wave which is numerically different, it generates a different math errors and digital to analog (D to A) errors. This can produce an undesired noise since signal may take as long as 42.95 seconds to repeat. This noise is spread across the spectrum at every integer multiple of 0.023283064 Hz up to 50 MHz. Since this error is caused at the roll-over from one sine wave to the next, it is hereinafter referred by the Applicant as “roll-over error”.
It is Applicant's believe the math error and/or “roll-over error” is uniquely observed by the Applicant and a corresponding solution to the problem was not found either. Accordingly, a solution is needed to overcome the roll-over error of the conventional DDS as described above and to achieve advantages of higher repeatability and sensitivity of testing results and subsequently improved inspection productivity.